Power on sequence generally refers to a series of power supply rail turn-on times for a processor in order to ensure proper start-up and functional integrity of the processor or system on chip.
The reason for having a power-on sequence is that a processor chip contains many parts, such as the core, memory, clocks, and input and output transceivers. A core needs to come before input and output transceivers are powered, or else the transceiver output driver input voltage is unknown. This created an unknown state at the I/O output driver level. Hence, the known good state of each component of the processor needs to be ensured before the next stage of events can happen. For example, cores, clocks, and internal memories should be powered up before interfacing with system memory and persistent storage such as DRAMS and NAND Flash.
Ways to design power in sequence
Daisy chain discrete voltage regulators with the power good (PG) output signal of one regulator to the enable pin of the next in line regulator.
Use a PMIC that has a programmable built-in sequencer and GPIO output to turn on other discrete regulators (either SMPS or Linear).
Things to watch out for
The processor or SoC might have reversed the order of the power-off sequence.
The timing between power-on events needs to be met according to the specifications of the processor datasheet.