Power on Sequence

Power on sequence generally refers to a series of sequence of power supply rails turn on time of a processor in order to suffice proper start up and functional integrity of a processor or system on chip.

The reason is for having a power on sequence is that a processor chip contains many parts such as core, memory, clocks, and input and output transceivers. A core needs to come and before input and and output transceivers are powered or else the transceivers output driver input voltage is unknown. This created unknown state of I/O output driver level. Hence a known good state of each components of the processor need to be ensured before next stage of events can be happened. For example, cores, clocks, and internal memories should be powered up before interfacing with system memory and persistent storage such as DRAMS and NAND Flash.

Ways to design power on sequence

1. Daisy chain discrete voltage regulators with power good (PG) output signal of one regulator to the enable pin of the next in line regulator.

2. Use a PMIC that has programmable built-in sequencer and GPIO output turn on other discrete regulators (either SMPS or Linear)

Things to watch out for

1. Processor or SoC might have reverse order of power off sequence

2. Timing between power on events needs to be met following the specification of the processor datasheet.