Created:11/05/2020Last Updated: 07/06/2023
Calculating the bandwidth required for each high-speed data lane is needed to select the right interface that can handle the data throughput to meet product's performance, such as 4K video streaming or HD camera capture.
Data Rate: Determine the data rate of the devices or systems that will be using the high-speed lane. The data rate is usually specified in bits per second (bps). For example, let's say the data rate is 1 gigabit per second (Gbps), which is equivalent to 1,000,000,000 bits per second.
Protocol Overhead: Consider any protocol overhead that may be present. Some protocols, such as Ethernet, add additional bits to the data being transmitted for error correction, addressing, and other control information. This overhead reduces the effective data rate. Check the specifications of the specific protocol being used to determine the overhead. Let's assume an overhead of 10%, which means the effective data rate would be 90% of the raw data rate.
Encoding Scheme: Consider the encoding scheme used to represent the data on the physical medium. Different encoding schemes can have varying levels of efficiency and can affect the overall bandwidth. For example, 8b/10b encoding is commonly used in some high-speed communication systems, where 8 bits of data are encoded into a 10-bit symbol. This encoding introduces additional overhead. Check the specifications of the specific encoding scheme being used to determine its impact on the bandwidth.
Duplexing: Determine if the high-speed lane supports full-duplex or half-duplex communication. In full-duplex, data can be transmitted and received simultaneously, while in half-duplex, data can only be transmitted or received at a given time. The bandwidth calculation will vary depending on the duplexing mode.
Effective Data Rate = (Data Rate * Protocol Overhead * Encoding Efficiency)
Bandwidth [Hz] = Effective Data Rate/(Bits/Symbol)
Effective Data Rate = (1,000,000,000 bps * 0.9 * 0.8) = 720,000,000 bps or 720 Mbps
Find the per-lane bandwidth requirements for the MIPI DSI 4-lane interface for a FHD display (1920*1080) at 60 frames per second.
Total Pixel size [bit] = 1920*1080*3*8 = 49766400 bits (there are three colors (RGB) per pixel, and each color has an 8-bit resolution).
Total raw video throughput [bits per second] without compression = Total Pixel Size*Frame Rate = 49766400 bits*60 Hz/Sec = 2985984000 bits/sec
Total DSI link throughput [bits per second] 1:3 video compression = total raw video throughput * compression ratio = 2985984000 bits/sec * 1/3 = 995328000 bits/sec
Total DSI per lane throughput [bit/sec] = 995328000/4 = 248832000 [bits/sec]
Bandwidth (i.e., data clock frequency) [Hz] =248832000/2(i.e., 2 bits per one clock frequency such as Double Data Rate (DDR)) = 124416000 Hz = 124 MHz
However, in reality, the actual high speed data link bandwidth will be lower than this due to factors such as packet overhead and network congestion.
Data rate is measured in bps (bits per second)
Bandwidth is measured in Hz.
Link consists of multiple data lanes.
In MIPI DSI DPhy, a link has 4 data lanes.