PCB Routing
Introduction
Routing: The act of creating electrical paths known as traces, which connect different pins and pads on the PCB. This process requires consideration of factors like trace impedance, current capacity, and cross-talk.
Background
Schematic Diagram: The blueprint of the electrical circuit that outlines how components are electrically connected.
RAT's NEST: This term refers to the visual representation of un-routed connections among component pads in PCB layout software.
Layers: Single-layer, double-layer, and multi-layer boards accommodate different levels of circuit complexity.
Design Rules Check (DRC): An automated check for ensuring design meets specific requirements like minimum trace width and spacing.
Footprints: Physical representations of components, indicating space and pad locations.
Trace Widths: Different signals may require different trace widths based on current and impedance.
Vias: Copper-plated holes connecting traces from one layer to another.
Gerber Files: Files sent to PCB manufacturers containing all information needed for board creation.
ODB++ is more of a modern standard for pcb fabrification files.
Bill of Materials (BOM): A list of all components, their types, and quantities needed for manufacturing.
Signal Integrity: Refers to the quality of electrical signals, affected by factors like noise and impedance mismatches.
Thermal Management: Considerations for dissipating heat from high-temperature components are crucial. Techniques such as using thermal relief pads are important for reducing issues during the reflow soldering process, ensuring even heat distribution across the PCB
Test Points: Locations on the PCB for attaching testing equipment, important for debugging and validation.
Design Steps
High-Speed Signal Breakout and Routing
Impedance Control: The trace impedance is tightly controlled, often requiring differential pairs.
Length Matching: Clock and data traces need to be length-matched to within very tight tolerances to ensure signal integrity.
Power Plane Copper Shape Sizing and Routing
Low AC Impedance: Achieved by using wide traces and copper pours, reducing the inductance in the path from voltage regulators to IC pins.
DCR IR Drop: Minimized by ensuring low-resistance paths from voltage regulators to high-current components.
Low-Speed Signal Breakout and Routing
Noise Immunity: Low-speed signals often operate at higher voltages, offering better noise immunity.
Isolation: Keep these traces away from high-speed and noisy signals to minimize cross-talk.
GPIO Breakout and Routing
Signal Integrity: Important to keep these isolated from high-speed signals to prevent cross-talk and signal integrity issues.
Best Practices
Switching Nodes: Never route any signal trace underneath a switching node in a power regulator, especially the inductor, to avoid high-frequency noise coupling.
Isolation: For high-speed traces, maintain at least 3x the trace width as a clearance from any other signal trace to minimize cross-talk.
Orthogonal Routing: On adjacent layers, route traces orthogonally to reduce capacitive coupling between layers.
Power planes (i.e using shapes for power routing):
These should be directly underneath or adjacent to IC or BGA pins. Couple them with ground planes to filter power noise effectively.
Ground Planes: These are critical for providing a low-impedance return path for currents, particularly for high-frequency signals.
Ground Short Pads for ground isolating: Used for isolating areas with high-switching currents, ensuring they don’t couple noise into sensitive areas of the board.
Note: Generally a ground plane is sufficient due the natural tendency of high speed current path wanting to return to path of least impedance.
Ground Stitching: Use multiple vias to connect ground planes on different layers, forming a low-impedance mesh.
EMI Control: Use via fences around the perimeter of the board to reduce radiated emissions. The rule of thumb is the the via spacing is 20x smaller than the electrical wave lenght of the highest operation frequency.
Via Spacing= c/20f
Finding the Highest Operating Frequency
Digital Components: Check the specifications for the highest clock frequency. For example, if you have a microcontroller running at 100 MHz, that's your starting point.
RF Components: If you have RF components, their frequency of operation is crucial. For example, Wi-Fi modules may operate at 2.4 GHz or 5 GHz.
Signal Harmonics: Real-world digital signals are not perfect sine waves but square waves, which contain odd harmonics. Therefore, you should consider frequencies up to the 5th or 7th harmonic as well. For a 100 MHz clock, this would mean considering frequencies up to 500 MHz or 700 MHz.
So for a highest considered frequency of 700 MHz in FR-4, the via spacing would be:
2×10^8 /(20×700×10^6) = 14.28 mm
Mechanical Rigidity: Use copper thieving or ground pour in empty areas to maintain PCB rigidity.
Note: Thieving is used to achieve rigidity for large and thin PCBs.
SUMMARY & CONCLUSION
Routing Sequence: High-speed signals should be prioritized, followed by power planes, low-speed signals, and then static or GPIO traces.
Spacing Guidelines: Keep high-speed traces isolated by at least 3x their width from other traces.
Copper Shape Choices: Use planes for ground and copper shapes for power, keeping them adjacent to reduce noise and facilitate easier routing.