Hardware System Validation

Created: April/2020Last Updated: 5/25/2020


Validating the product electrical design is critical to product performance and reliability. Without that, a product life cycle can be severally limited due to component failure. Following commonly tests items is strongly recommended.


The primary goal of RF test is to validate the transmitter and receiver performance of the wireless device, which is the validating following two concepts:

  • Link Budget: It is the received RF signal power at the RF receiver from RF transmitter accounting all RF path gains (i.e power amplifier output, Antenna gain) and transmission loss (i.e PCB loss, matching network loss, free space path loss)
  • Link Margin: It's the difference between the received RF signal power at RF receiver and RF receiver sensitivity. It's a measure of margin of safety that the communication link has left.

Three tests are done for RF system namely

  1. Antenna
    1. return loss
    2. isolation if more than one antenna is used
    3. efficiency
    4. radiation pattern
      • All three planes, XY, XZ, and YZ
  2. Conducted test
    • Conducted test is measuring the RF transceiver performance without the antenna. The antenna connector is directly connected to a wireless connectivity protocol test device and spectrum analyzer.
    • Transmitter path
      1. Average power, peak power, error vector magnitude (EVM), spectrum mask, frequency error, etc. data are measured.
    • Receiver path
      1. packet error rate of receiver sensitivity must be validated against wireless module specification (e.g PER <10% within +/- 2dB of -73 dBm sensitivity at for 802.11n @ MCS15 modulation)
  3. Radiated Test
    • TIS total isotropic sensitivity: it's a single value sensitivity number characterizing 3-D spatial receiver performance.
    • TRP total radiated power: it's a single value power number characterizing 3-D spatial transmitter performance.
    • Rate vs Range Throughput Test
      • It tests the throughput between device and access point at various simulated distance
      • Downstream
        • it tests the down link receive path quality of the device. Poor receiver performance results in lower download throughput.
      • Upstream
        • it tests the up link transmit path quality of the device.
  4. Benchmark (Additional test)
    • Test device is strongly recommended to compare performance with reference or competitor products for RF performance validation.

Test Setup

Must be taken in side a shield RF chamber.

All test equipment and reference measurement device must be calibrated and any cable loss must be taken account for.

Test Acceptance Criteria

  • Must met RF receiver and transmitter performance outlined by the wireless standards.
  • Strongly recommended to perform competitive analysis to benchmark against other products.
  • Strongly to include a minimum baseline throughput (e.g 20 mbps for 4k streaming) at real world condition (e.g. 10 m)


All basic functionality for each subsystem much be verified.

e.g. Display turns on, voltage regulator outputs right level, audio speaker can be drivien, radio is working, etc.

Signal integrity

All digital interface has its communication timing (setup and hold time), voltage levels, clock jitter, etc. requirements. Failure to meeting any of them will cause communication to drop packets or worst case lose connection.

Following tests should be used to verify signal integrity.

Signal Eye diagrams

    • Clock jitters
    • voltage levels (e.g. differentials voltage swings)
    • Timing
      • skews for differential pairs
      • setup and hold time
      • rise/fall time

Signal trace Impedance TDR measurements

    • signal ended
      • generally 45 to 50 ohms
    • differential signaling
      • 85 to 100 ohms.


Clock frequency, offset, drift, jitter, etc impacts correct operation of the overall product as all subsystem needs to ensure it is clocked correctly. If there is error in frequency for RF modulators, then incorrect carrier frequency will be generated and it will miss the target link channel frequency.


    • negative resistance
    • frequency accuracy (i.e offset and phase noise)
    • drive level.


Power regulators must main its regulation under all load conditions. To verify voltage regulation, following test shall be conducted:

  • Test Items
    • Line and load regulation test with different input voltage and output current sweep
    • Line and load step test test with different line input voltage step size and output load current step size.
    • Voltage ripple test
    • Efficiency
  • System
    • Sleep and Active current for each subsystem
  • protection circuit
    • short circuit protection, over voltage protection.
  • Power on sequence
    • For more complex parts such as System on Chip, DRAM, Flashstorage, etc, there are multiple power domains within each IC that has different voltages requiring separate external power regulators.
    • Each power domain with an IC must be powered on in a predefined sequence or else IC will stuck in a erroneous state and this is what we mean by power on sequence test.
      • For example, an I/O domain is responsible for powering the pad voltage of transceiver used in communication between external devices, and is controlled by the core. Hence if the pad voltage of the driver comes up before the core did, then the I/O driver output is in-determined and can sent the right output voltage to the circuit that its controlling.


Power distribution network is essential inside a high speed and high power usage computation device. It is consisting of power plane layout, decoupling capacitors, voltage regulator regulation, to deliver the charges quickly enough to the high speed/power load such as a processor for running applications or a power amplifier for radio transmission.

Need to verify impedance vs frequency curve (from DC to AC range) for all required PDN power pins as specified by chip manufacturer.


Electrostatic discharge is a short pulse of kV of transient voltage that can be transfer from a human body to an electrical device. This can damage the electronics components such as screen, LED, and analog components such as antenna, matching network, and radio transceivers.

Zap the any ingression points such as connector pins, seams, plastic surface with ESD guns.

  • Contact discharge
  • Air discharge

Testing Methodology

For SI measurements:

  • probe at receiver side
  • use probe with at least 10x bandwidth than that of the signal of interest
  • for very high speed differential signals, use active probe for isolation

For power measurements:

  • Probe directly at the output capacitor.
  • Minimize ground loop of the probe by placing the ground clip near to the probe pin. Recommend use probe tip ground instead.

Summary & Conclusion

In this article, we outlined some common test areas, RF, signal integrity, power regulators, PDN, and ESD. Performing these tests ensure a good quality of design. In the case of shipping products in tens of millions rnage, any small issue is amplified to a significant problem. interesting enough, with high enough volume, new problems arises,

As a good designer, we must come up with a validation test plan early and start testing as soon as possible, and make changes accordingly. Hardware development is a game of racing against a fixed schedule with increasing design complexity generation after generation.